Section: Software

FloPoCo

Participants : Florent de Dinechin [correspondant] , Matei Istoan.

The purpose of the FloPoCo project is to explore the many ways in which the flexibility of the FPGA target can be exploited in the arithmetic realm. FloPoCo is a generator of operators written in C++ and outputting synthesizable VHDL automatically pipelined to an arbitrary frequency.

In 2012, the diverging multiplier implementations in FloPoCo were unified using a common bit-heap framework. In addition, several new operators were added.

FloPoCo also now offers state-of-the-art random generators written by David Thomas at Imperial College.

Versions 2.3.1 and 2.4.0 were released in 2012.

Among the known users of FloPoCo are U. Cape Town, U.T. Cluj-Napoca, Imperial College, U. Essex, U. Madrid, U. P. Milano, T.U. Muenchen, T. U. Kaiserslautern, U. Paderborn, CalTech, U. Pernambuco, U. Perpignan, U. Tokyo, Virginia Tech U. and several companies.

URL: http://flopoco.gforge.inria.fr/

• Version: 2.3.0 (december 2011)

• APP: IDDN.FR.001.400014.000.S.C.2010.000.20600 (version 2.0.0)

• License: specific, GPL-like.

• Type of human computer interaction: command-line interface, synthesizable VHDL output.

• OS/Middleware: Linux, Windows/Cygwin.

• Required library or software: MPFR, flex, Sollya.

• Programming language: C++.

• Documentation: online and command-line help, API in doxygen format, articles.